Let us discuss about binary decoder. Decoder is a combinational circuit with N input lines and two to the power
N output lines in functionality. A binary decoder converts a definite
sequence of input bits into a specific pattern as decided by the user based on the requirement
This figure shows a binary decoder with one enabled pin E and three input lines I zero I one and
I two which further results in eight lines at its output. The output sequence of a decoder for a particular input
pattern is realized using its truth table. This table shows the truth table for the decoder of 3 to 8 which
shows that when they enable is low, all the output lines are low no matter what the input sequence be here denotes
don't care condition. This indicates the off state of the decoder which can also be considered to be its reset state
Thus one has to drive high on the enabled pin to realize the functionality of the decoder table shows that for the input sequence
I two I one I zero equals 000. The output pin 00 of the decoder is high
While all other bits that is 07 down to 01 remain low
Likewise, for the input sequence of 001 only 01 is high. Similar observation shows that only one output
line is high for any given input bit pattern. That is 02 is high for 010 03
is high for 011 04 is high for 100 05
is high for 101 06 is high for 110 and
07 is high for 111. Thus, the Boolean equations for the outputs of the 3 to 8
decoder are given by 00 equals E I two bar I one bar I zero bar
And that is equation one 01 equals E I two bar I one bar I zero
And that is equation two 02 equals E I two bar I one I zero bar
And that is equation three 03 equals E I two bar I one I zero
And that is equation four 04 equals E I two I one bar I zero bar
And that is equation five 05 equals E I two I one bar I zero
And that is equation six 06 equals E I two I one I zero bar
And that is equation seven 07 equals E I two I one I zero
And that is equation eight equations 1 to 8 show that the 3 to 8 decoder of figures can be designed
using and and not gates as shown by this figure. This is due to the fact that the output lines are nothing but the logical
and of either input, shown by blue lines or its negation shown by red lines with the enabled signal shown by black
line. The ogy presented here for 3 to 8 or 3 to 2 to the power three decoder holds good for
any end to two to the power N decoder. However, the output bit pattern need not be the same as the one explained
These kinds of decoders are used in the applications such as data multiplexing seven Sigmund display and so on
This is basic of decoder. Thank you